Classic Computing
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PDP-8 Maintenance Manual Preliminary, F-87P2, 1965Processor Utilization Module List UML-E-8P-0-19Note, to make this figure easier to type, I've turned it on its side! Key: ---- unused slot ++ low half of double height module Back end of CPU Backplane Top Bottom PA PB PC PD PE PF 1 W024 W024 W024 W024 W024 W024 2 W026 ---- R284 W024 I/O I/O 3 W026 W026 R603 R113 I/O I/O 4 W026 W026 R111 R002 I/O I/O 5 W026 W026 R111 R002 R123 ---- 6 R210 ++ R181 R181 R107 ---- 7 R210 ++ R211 ++ ---- ---- 8 R210 ++ R211 ++ R650 ---- 9 R210 ++ R211 ++ W005 ---- 10 R210 ++ R211 ++ ---- W640 11 R210 ++ R211 ++ A502 A604 12 R210 ++ R211 ++ R203 A604 13 R210 ++ R211 ++ R401 A604 14 R210 ++ R211 ++ R302 A601 15 R210 ++ R211 ++ R603 A601 16 R210 ++ R211 ++ A704 ++ 17 R210 ++ R211 ++ R111 R212 18 R210 ++ R211 ++ R123 R212 19 R603 R603 R181 R181 R123 R212 20 R602 R602 R602 R603 R111 R212 21 R107 R603 R603 R603 R002 R212 22 R111 R111 R603 R602 R107 R212 23 R002 R111 R603 R111 R603 R602 24 R111 R111 R002 R111 R002 R111 25 R111 R284 R111 R002 R205 R205 26 R002 R107 R111 R107 R111 R205 27 R111 R151 R111 R111 R111 R205 28 R602 R203 R111 R111 R002 R603 29 R603 R111 R002 R002 R603 R111 30 R111 R107 R602 R401 R107 R602 31 R111 R111 R111 R107 R603 R111 32 R002 R111 R203 R602 R203 R111 33 R603 R107 R603 R602 R203 R002 34 R302 R202 R302 R002 R111 R111 35 R302 R405 R111 R002 R111 R002 36 W501 R603 R203 R111 R111 R405 PA PB PC PD PE PF Top Bottom Front end of CPU Backplane PDP-8 Maintenance Manual, F-87, 2/66Processor Utilization Module List UML-E-8P-0-19Note, to make this figure easier to type, I've turned it on its side! Key: ---- unused slot ++ low half of double height module * used only with #182 EAE & used only with #189 A-D converter = used only with KR01 power interrupt > used only with 681 data line interface ! differs from preliminary version! (DWJ) Back end of CPU Backplane Top Bottom PA PB PC PD PE PF 1 W024 W024 W024 W024 W024 W024 2 W026 ---- R284 W024 W011 ! W011 ! 3 W026 W026 R603 < R113 < W011 ! W011 ! 4 W026 W026 R121 < R002 !< W011 ! W011 ! 5 W026 W026 R111 < R603 R123 < R107 != 6 R210 ++ R181 R181 R107 < R002 != 7 R210 ++ R211 ++ R107 R302 != 8 R210 ++ R211 ++ R650 W501 != 9 R210 ++ R211 ++ W005 R602 != 10 R210 ++ R211 ++ R121 ! W640 11 R210 ++ R211 ++ A502 & A604 & 12 R210 ++ R211 ++ R203 & A604 & 13 R210 ++ R211 ++ R401 & A604 & 14 R210 ++ R211 ++ R302 &= A601 & 15 R210 ++ R211 ++ R603 &< A601 & 16 R210 ++ R211 ++ A704 & ++ 17 R210 ++ R211 ++ R111 * R212 * 18 R210 ++ R211 ++ R123 * R212 * 19 R603 R603 R181 R181 R123 * R212 * 20 R602 R602 R602 R603 R111 * R212 * 21 R107 R603 R603 R603 R002 * R212 * 22 R111 R111 R603 R602 R107 * R212 * 23 R002 R111 R603 R111 R603 * R602 * 24 R111 R111 R002 R111 R002 * R111 * 25 R111 R284 R111 R002 R205 * R205 * 26 R002 R107 R111 R107 R111 * R205 * 27 R111 R151 R111 R111 R111 * R205 * 28 R602 R203 R111 R111 R002 * R603 * 29 R603 R111 R002 R002 R603 * R111 * 30 R111 R107 R602 R401 R107 * R602 * 31 R111 R111 R111 R107 R603 * R111 * 32 R002 R111 R203 R602 R203 * R111 * 33 R603 R107 R603 R602 R203 * R002 * 34 R302 R202 R302 R002 R111 * R111 * 35 R302 R405 R111 R002 R111 * R002 * 36 W501 R603 R203 R111 R111 * R405 * PA PB PC PD PE PF Top Bottom Front end of CPU Backplane PDP-8 Maintenance Manual, F-87, 2/66Memory Utilization Module List UML-E-8M-0-20Note, to make this figure easier to type, I've turned it on its side! Key: ---- unused slot * used only with type 183 memory extension control ^ used only with type 188 memory parity option ++ lower half of double height module ~ Component plate containing inhibit driver resistors = Memory Stack Front end of Memory Backplane Top Bottom MA MB MC MD ME MF 36 ~ ~ R203 * R205 * R201 * R111 * 35 ~ ~ R203 * R205 * R201 * R002 * 34 ~ ~ R151 * R201 * R201 * R111 * 33 ~ ~ R151 * R201 * R603 * R002 * 32 ~ ~ R151 * R201 * R603 * W640 * 31 ~ ~ G209 ++ R111 * R123 * 30 ~ ~ G209 ++ R107 * R123 * 29 = = G209 ++ R107 * B360 ^ 28 = = G209 ++ R002 ^ B104 ^ 27 = = W025 ++ R111 ^ R603 ^ 26 = = W025 ++ B130 ^ R202 ^ 25 = = G209 ++ B130 ^ B130 ^ 24 = = G209 ++ B130 ^ B130 ^ 23 = = G209 ++ B130 ^ R202 22 = = G209 ++ R405 R202 21 = = R650 B204 R111 R202 20 = = W300 ++ R002 R603 19 = = W300 ++ R111 R603 18 = = W607 B104 R107 R202 17 = = B602 B360 R202 R202 16 = = G208 G208 R203 R603 15 = = G208 G208 R220 R220 14 = = W025 ++ R220 R220 13 = = G208 G208 R220 R220 12 G007 G007 G208 ^ R650 R205 W050 11 G007 G007 R650 R650 R650 R650 10 G007 G007 R650 R650 R650 R650 9 G007 G007 R650 R650 R650 R650 8 G007 G007 R650 R650 ---- ---- 7 G007 G007 ---- W640 W011 * W070 6 G007 ^ G008 W640 B684 * W011 * W011 * 5 R603 * B684 * B684 * B684 * W011 * W011 * 4 R603 * B684 * B684 * B684 * W011 * W011 * 3 R603 * B684 * B684 * B684 * W011 W011 2 W026 B684 * B684 * W024 * W011 W011 1 W024 W024 W024 W024 W024 W024 MA MB MC MD ME MF Top Bottom Back end of Memory Backplane (With thanks to Doug Jones for the processor sections) |
| (C) Kevin Murrell, January 2000 |